TTIHP26b shuttle closed with 123 designs

Chips expected June 2027, shipping August 2027.


Chip Render - Logic Density

Chip Render - Logic Density

That’s wrap! We closed TTIHP26b yesterday. 123 projects submitted to the IHP-2609 shuttle, heading to manufacturing on the 0.13μm process.

Chips are expected on June 25, 2027, with estimated shipping on August 16, 2027.

Here are some of the designs:

Leo and the Fabulous team built a full FPGA on a single Tiny Tapeout tile, the Tiny FABulous FPGA. Then we have Preinception, a simple compute accelerator, connected via USB and driven with a C++ API and code on the host PC. There’s also a Scalable Banked L1 Memory Fabric purpose-built for edge AI.

On the analog side, we’ve got IEEE Bandgap References, LDO regulators, SAR ADC controllers, and a laser gyro readout core!.

Check out all the designs here!

Interested in submitting a design?

Here’s a list of future shuttles and how you can submit your design.


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