705 cpu_8bit
705 : cpu_8bit
- Author: Sunao Furukawa
- Description: This Verilog code is geenrated by Bing AI
- GitHub repository
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- Clock: 50000000 Hz
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IO
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | instruction register [0] | segment a | |
| 1 | instruction register [1] | segment b | |
| 2 | instruction register [2] | segment c | |
| 3 | instruction register [3] | segment d | |
| 4 | formula right side [4] | segment e | |
| 5 | formula right side [5] | segment f | |
| 6 | formula right side [6] | segment g | |
| 7 | formula right side [7] | dot |