
A programmable 8b input, 8b output freely programmable logic block with optional internal feedback. This can serve many purposes, once an FPGA-style configuration SW is available.
Just a way to set digital inputs is needed, plus a way to check the digital outputs.
| # | Input | Output | Bidirectional |
|---|---|---|---|
| 0 | data in0 | data out0 | load enable |
| 1 | data in1 | data out1 | load clk |
| 2 | data in2 | data out2 | load data |
| 3 | data in3 | data out3 | |
| 4 | data in4 | data out4 | |
| 5 | data in5 | data out5 | dbg out0 |
| 6 | data in6 | data out6 | dbg out1 |
| 7 | data in7 | data out7 | dbg out2 |