83 2's Compliment Subtractor

83 : 2's Compliment Subtractor

Design renderSelect Project123456789ONSW2
  • Author: Naman Garg and Aryan Chaudhary
  • Description: Subtracts two 4-bit binary numbers using 2's complement subtraction method
  • GitHub repository
  • Clock: 0 Hz

How it works

Explain how your project work "It uses 4 full adder circuits made by using XOR and AND gates."

How to test

Explain how to test your project "enter two 4 bit binary numbers in the inputs to try it out."

IO

#InputOutput
0A0segment a
1A1segment b
2A2segment c
3A3segment d
4B0segment e
5B1segment f
6B2segment g
7B3dot