With the ld signal true, the u_bit and v_bit inputs are used to scan the n-bit numbers into the block. Simulataneously, the high-order bit of the u register is scanned out, allowing access to the result of the last computation. Upon lowering the ld signal, the Euclid iteration starts. When done, the done signal is raised.
Chiseltest enabled tests. Go to chisel and run sbt test.
| # | Input | Output |
|---|---|---|
| 0 | clock | z_bit |
| 1 | reset | done |
| 2 | ld | none |
| 3 | u_bit | none |
| 4 | v_bit | none |
| 5 | none | none |
| 6 | none | none |
| 7 | none | none |