This is one of the blocks of a phased locked loop. The inputs are a reference clock and feedback clock and the outputs are the phase difference on either up or /down pin.
If the phase of the feedback clock is leading the reference clock, the up signal should show the phase difference. If it’s lagging, the down signal will show the difference.
| # | Input | Output |
|---|---|---|
| 0 | reference clock | up |
| 1 | feedback clock | (inverted) down |
| 2 | active-low reset | none |
| 3 | none | none |
| 4 | none | none |
| 5 | none | none |
| 6 | none | none |
| 7 | none | none |