19 LUTRAM

19 : LUTRAM

Design renderSelect Project123456789ONSW2
  • Author: Luis Ardila
  • Description: LUTRAM with 4 bit address and 8 bit output preloaded with a binary to 7 segments decoder, sadly it was too big for 0-F, so now it is 0-9?
  • GitHub repository
  • Clock: 0 Hz

How it works

uses the address bits to pull from memory the value to be displayed on the 7 segments, content of the memory can be updated via a clock and data pins, reset button will revert to default info, you would need to issue one clock cycle to load the default info

How to test

clk, data, rst, nc, address [4:0]

IO

#InputOutput
0clocksegment a
1datasegment b
2resetsegment c
3ncsegment d
4address bit 3segment e
5address bit 2segment f
6address bit 1segment g
7address bit 0segment pd