counter + combinational logic
set the clock divider to 1 hz. toggle reset and watch the 7 segment display
| # | Input | Output |
|---|---|---|
| 0 | clock | segment a |
| 1 | reset | segment b |
| 2 | none | segment c |
| 3 | none | segment d |
| 4 | none | segment e |
| 5 | none | segment f |
| 6 | none | segment g |
| 7 | none | none |