Using Shift Register Line and Rolling Sum Trick
Clock in the high 5 bits of io_in (io_in[7:3]) with the i_data_clk (io_in[2]) (active high), and read output on io_out[4:0]
| # | Input | Output |
|---|---|---|
| 0 | clock | ra_out[0] |
| 1 | reset | ra_out[1] |
| 2 | i_data_clk | ra_out[2] |
| 3 | i_value[0] | ra_out[3] |
| 4 | i_value[1] | ra_out[4] |
| 5 | i_value[2] | 0 |
| 6 | i_value[3] | 0 |
| 7 | i_value[4] | 0 |