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Tiny Tapeout IHP 0.2
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Silicon proven projects
Digital Design Guide
Getting started with our digital design tool
Holidays
Logic Gates
Logic Puzzle - Flip Flop
Logic Puzzle - Edge Detect
Logic Puzzle - Full Adder
Logic Puzzle - Padlock
Customisable Design - Padlock
Customisable Design - UART
Customisable Design - 7-Seg
Simple automated testing using truth tables
Generating Wokwi designs from truth tables
How do semiconductors work?
Introduction to SiliWiz
Draw a Resistor
Parasitics
Voltage Divider
Draw a capacitor
Draw an N MOSFET
Making a logic inverter
Draw a P type MOSFET
Draw a CMOS inverter
Making ASICs
Working with HDLs
Important!
FPGA to ASIC
HDL resources
HDL templates
Testing your design
Competitions
TT10 Demoscene
TT08 Demoscene Entries
TT08 Demoscene (closed)
Guides
TT04+ demoboard quickstart
Local hardening
Testing Projects with the Analog Discovery
Updating your project documentation
Workshop
1 - Draw your own MOSFET
2 - Simulate a logic gate
3 - Create the GDS
4 - Submit your design
5 - Optional - Activate and Test a Design
Tech specs
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GPIO pins
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PCB (TT02-03)
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Working with HDLs
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HDL resources
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Verilog explorer in the browser
WTFpga workshop
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Verilog cheatsheet
Tools
All the open source tools in one bundle
Cocotb website
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join the verilog and HDL channel of our discord server
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